Introduction to Incremental Encoders

Introduction to Incremental Encoders
This article provides a brief introduction to incremental encoders and incremental encoder interfaces. It discusses the operation and construction of incremental encoders as well as important design considerations for the incremental encoder interface.	A multi-function board with six incremental encoder interfaces
Introduction to Incremental Encoders An incremental encoder is an electromechanical device that generates pulses on A and B (aka "clock") outputs in response to incremental mechanical movements. Two basic types of incremental encoders are available: linear incremental encoders, which detect linear motion; and rotary incremental encoders which detect movement of a rotating shaft. In either case, when an encoder is moving at a constant speed, the output pulses take the form of quadrature-encoded square waves. As an encoder moves faster, the pulse frequency increases accordingly. Since the relationship between pulse frequency and velocity is linear, it's a simple matter to use the pulse frequency as an indication of speed. The output pulses can be transformed into speed units by measuring their frequency, and then multiplying the frequency by an appropriate scale factor. In the case of rotary incremental encoders, most devices employ a pulse generator consisting of a light source, a disk that rotates about the shaft, and a photodetector. The rotating disk has alternating opaque and transparent regions which serve to block the light or pass it through to the detector. As the disk rotates, the detector receives light pulses, thus causing it to output a stream of electrical pulses. The shaft, in turn, is coupled to a mechanical system that is to be instrumented so that its speed and/or position can be monitored. Linear incremental encoders often employ a similar mechanism, using a linear scale which the encoder and mechanical system traverse together. A single output pulse stream is useful for measuring speed, but it doesn't indicate the direction of movement (i.e., forward/backward or clockwise/counter-clockwise). To get around this problem, an incremental encoder uses dual pulse generators to allow it to simultaneously output two pulse streams. The two detectors are intentionally misaligned to cause a 90 degree phase difference between the clocks, thereby making the clocks quadrature-encoded (A will lead B for one direction of travel, and vice versa when the encoder moves in the opposite direction). An incremental encoder's travel direction can be determined by detecting the phase relationship between A and B, while its speed can be determined by measuring the frequency of either clock. It's possible to obtain higher measurement resolution by "multiplying" the clock frequency. This is accomplished by counting clock edges instead of clock pulses. Each clock has both a rising edge and a falling edge for each pulse, so by counting all edges of both the A and B clock phases, it is possible to get four times the resolution one would get by simply counting pulses from the A clock. In addition to the clock outputs, some incremental encoders also produce an "index" signal. In rotary encoders, this signal consists of a single pulse that occurs at a reference position on the encoder's shaft. The Incremental Encoder Interface At the core of every incremental encoder interface is a synchronous up/down counter. This counter is fundamental to all incremental encoder interfaces because it tracks the position of the instrumented mechanical system. The counts are incremented when the encoder moves in one direction and decremented when the encoder moves in the other direction. At any moment, the position of the mechanical system is indicated by the current counts value. To convert the position to distance units, the counts must be multiplied by an appropriate scalar. Encoder speed is measured by sampling the counts twice, at different times. The speed is then computed by taking the difference between sampled counts and dividing it by the elapsed time (between samples). When using a x4 clock multiplier, this gives the average speed (during the elapsed time) expressed in clock edges/second. To convert measured speed to distance units, the edges/second must be multiplied by an appropriate scalar. Design Considerations Incremental encoders are used in measurement and control systems, and such systems are usually controlled by a CPU. Since the encoder counter is typically sampled by a CPU, and CPUs have other responsibilities besides sampling encoder counts, there are some special considerations to take into account when designing incremental encoder interfaces. Resolution: An encoder counter has finite resolution, measured in bits. For example, a four bit counter has sixteen possible states. Suppose for a moment that an incremental encoder is moving in only one direction, and the CPU must periodically sample the counts so as to know the position. A four bit counter will overflow every sixteen counts, so the CPU must therefore sample counts faster than the worst-case overflow rate to avoid losing track of the position. If the encoder is allowed to move in both directions, the CPU must sample counts twice as fast. Clearly, higher counter resolution results in less demand on the CPU. In many applications, 24 bits is a practical minimum. For high speed and/or high precision applications, 32 bit resolution is recommended. Integrity: The CPU data path is not always a perfect match for the counter resolution. For example, an application might have a 32 bit encoder counter that is accessed by an 8 or 16 bit CPU. In such cases, it is important that the counts value not change in the middle of a counts transfer to the CPU. To ensure this, an incremental encoder interface must double buffer the counts. When the CPU is ready to read the counts, it writes to a control register to cause the counts to be synchronously transferred to a buffer register. The CPU can then read the counts from the buffer register, either all at once or in pieces, at its leisure, without the risk of receiving corrupted data. Speed: To ensure glitch-free operation, an incremental encoder interface must be a fully synchronous digital design. Since the encoder's output signals are asynchronous with respect to the interface clock, they must be synchronized to the system clock before they are passed into the interface's core logic. Sampling theory dictates that the system clock frequency must be greater than the highest event frequency, and since the events of interest are encoder clock edges, the system clock must have a frequency greater than four times that of the encoder's A or B frequency. In practice, the system clock frequency must be even higher than this because an encoder's clocks will never have exactly 90 degrees phase difference. Similary, the incremental encoder interface is a synchronous design, so the encoder counter must be capable of counting at the system clock rate. Preload: As mentioned above, the CPU has responsibilities other than servicing the incremental encoder interface. Consequently, a practical encoder interface must provide hardware functions that would be difficult or impossible for the CPU to perform in real time. For example, to make highly accurate speed measurements, the encoder interface must be able to snapshot (sample) the counts automatically in response to a trigger from a timer or external signal. Furthermore, if closely-spaced triggers are expected, the interface must provide a FIFO buffer to prevent dropped samples. Another important function is counter preloading (forcing the counts to a pre-specified value) upon external input signal, which is essential for high-performance mechanical system homing.

This article provides a brief introduction to incremental encoders and incremental encoder interfaces. It discusses the operation and construction of incremental encoders as well as important design considerations for the incremental encoder interface.

A multi-function board with six incremental encoder interfaces

Introduction to Incremental Encoders

An incremental encoder is an electromechanical device that generates pulses on A and B (aka "clock") outputs in response to incremental mechanical movements. Two basic types of incremental encoders are available: linear incremental encoders, which detect linear motion; and rotary incremental encoders which detect movement of a rotating shaft. In either case, when an encoder is moving at a constant speed, the output pulses take the form of quadrature-encoded square waves.

As an encoder moves faster, the pulse frequency increases accordingly. Since the relationship between pulse frequency and velocity is linear, it's a simple matter to use the pulse frequency as an indication of speed. The output pulses can be transformed into speed units by measuring their frequency, and then multiplying the frequency by an appropriate scale factor.

In the case of rotary incremental encoders, most devices employ a pulse generator consisting of a light source, a disk that rotates about the shaft, and a photodetector. The rotating disk has alternating opaque and transparent regions which serve to block the light or pass it through to the detector. As the disk rotates, the detector receives light pulses, thus causing it to output a stream of electrical pulses. The shaft, in turn, is coupled to a mechanical system that is to be instrumented so that its speed and/or position can be monitored. Linear incremental encoders often employ a similar mechanism, using a linear scale which the encoder and mechanical system traverse together.

A single output pulse stream is useful for measuring speed, but it doesn't indicate the direction of movement (i.e., forward/backward or clockwise/counter-clockwise). To get around this problem, an incremental encoder uses dual pulse generators to allow it to simultaneously output two pulse streams. The two detectors are intentionally misaligned to cause a 90 degree phase difference between the clocks, thereby making the clocks quadrature-encoded (A will lead B for one direction of travel, and vice versa when the encoder moves in the opposite direction). An incremental encoder's travel direction can be determined by detecting the phase relationship between A and B, while its speed can be determined by measuring the frequency of either clock.

It's possible to obtain higher measurement resolution by "multiplying" the clock frequency. This is accomplished by counting clock edges instead of clock pulses. Each clock has both a rising edge and a falling edge for each pulse, so by counting all edges of both the A and B clock phases, it is possible to get four times the resolution one would get by simply counting pulses from the A clock.

In addition to the clock outputs, some incremental encoders also produce an "index" signal. In rotary encoders, this signal consists of a single pulse that occurs at a reference position on the encoder's shaft.

The Incremental Encoder Interface

At the core of every incremental encoder interface is a synchronous up/down counter. This counter is fundamental to all incremental encoder interfaces because it tracks the position of the instrumented mechanical system. The counts are incremented when the encoder moves in one direction and decremented when the encoder moves in the other direction. At any moment, the position of the mechanical system is indicated by the current counts value. To convert the position to distance units, the counts must be multiplied by an appropriate scalar.

Encoder speed is measured by sampling the counts twice, at different times. The speed is then computed by taking the difference between sampled counts and dividing it by the elapsed time (between samples). When using a x4 clock multiplier, this gives the average speed (during the elapsed time) expressed in clock edges/second. To convert measured speed to distance units, the edges/second must be multiplied by an appropriate scalar.

Design Considerations

Incremental encoders are used in measurement and control systems, and such systems are usually controlled by a CPU. Since the encoder counter is typically sampled by a CPU, and CPUs have other responsibilities besides sampling encoder counts, there are some special considerations to take into account when designing incremental encoder interfaces.

Resolution: An encoder counter has finite resolution, measured in bits. For example, a four bit counter has sixteen possible states. Suppose for a moment that an incremental encoder is moving in only one direction, and the CPU must periodically sample the counts so as to know the position. A four bit counter will overflow every sixteen counts, so the CPU must therefore sample counts faster than the worst-case overflow rate to avoid losing track of the position. If the encoder is allowed to move in both directions, the CPU must sample counts twice as fast. Clearly, higher counter resolution results in less demand on the CPU. In many applications, 24 bits is a practical minimum. For high speed and/or high precision applications, 32 bit resolution is recommended.

Integrity: The CPU data path is not always a perfect match for the counter resolution. For example, an application might have a 32 bit encoder counter that is accessed by an 8 or 16 bit CPU. In such cases, it is important that the counts value not change in the middle of a counts transfer to the CPU. To ensure this, an incremental encoder interface must double buffer the counts. When the CPU is ready to read the counts, it writes to a control register to cause the counts to be synchronously transferred to a buffer register. The CPU can then read the counts from the buffer register, either all at once or in pieces, at its leisure, without the risk of receiving corrupted data.

Speed: To ensure glitch-free operation, an incremental encoder interface must be a fully synchronous digital design. Since the encoder's output signals are asynchronous with respect to the interface clock, they must be synchronized to the system clock before they are passed into the interface's core logic. Sampling theory dictates that the system clock frequency must be greater than the highest event frequency, and since the events of interest are encoder clock edges, the system clock must have a frequency greater than four times that of the encoder's A or B frequency. In practice, the system clock frequency must be even higher than this because an encoder's clocks will never have exactly 90 degrees phase difference. Similary, the incremental encoder interface is a synchronous design, so the encoder counter must be capable of counting at the system clock rate.

Preload: As mentioned above, the CPU has responsibilities other than servicing the incremental encoder interface. Consequently, a practical encoder interface must provide hardware functions that would be difficult or impossible for the CPU to perform in real time. For example, to make highly accurate speed measurements, the encoder interface must be able to snapshot (sample) the counts automatically in response to a trigger from a timer or external signal. Furthermore, if closely-spaced triggers are expected, the interface must provide a FIFO buffer to prevent dropped samples. Another important function is counter preloading (forcing the counts to a pre-specified value) upon external input signal, which is essential for high-performance mechanical system homing.