Difference between revisions of "GPIO interfacing"
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| − | Sensoray offers a number of products that have general purpose digital I/O (GPIO) interfaces. When interfacing a GPIO to external circuitry it is important to follow some basic rules to ensure proper operation and avoid damage to the GPIO and external | + | Sensoray offers a number of products that have general purpose digital I/O (GPIO) interfaces. When interfacing a GPIO to external circuitry it is important to follow some basic design rules to ensure proper operation and avoid damage to the GPIO and external circuitry: |
| − | * '''Input range''' - When the GPIO is acting as an input or wired-OR, make sure the external signal source will never exceed the GPIO's input voltage range. In the case of TTL/CMOS compatible GPIOs (''e.g.'', models [ | + | * '''Input range''' - When the GPIO is acting as an input or wired-OR, make sure the external signal source will never exceed the GPIO's input voltage range. In the case of TTL/CMOS compatible GPIOs (''e.g.'', models [[826]] and [[2410]]), the input range is typically 0 to +5 V. Some products support wider voltage ranges; for example, the [http://www.sensoray.com/products/2610.htm model 2610] input voltage range is 0 to +24 V. |
| − | * '''Common ground''' - If the GPIO is not isolated, the external circuit and GPIO interface must share a common power supply return. For example, in the case of a [ | + | * '''Common ground''' - If the GPIO is not isolated, the external circuit and GPIO interface must share a common power supply return. For example, in the case of a [[2410]], the 2410's power supply return (''i.e.'', negative power supply input) must be connected to the external circuitry's power supply return. |
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| + | * '''Edge rate''' - Strive for fast signal edge rates when a GPIO is driven by an external signal source. Slow rise and fall times can cause sampling errors and, in extreme cases, damage GPIO line receivers. | ||
Latest revision as of 10:35, 16 February 2017
Sensoray offers a number of products that have general purpose digital I/O (GPIO) interfaces. When interfacing a GPIO to external circuitry it is important to follow some basic design rules to ensure proper operation and avoid damage to the GPIO and external circuitry:
- Input range - When the GPIO is acting as an input or wired-OR, make sure the external signal source will never exceed the GPIO's input voltage range. In the case of TTL/CMOS compatible GPIOs (e.g., models 826 and 2410), the input range is typically 0 to +5 V. Some products support wider voltage ranges; for example, the model 2610 input voltage range is 0 to +24 V.
- Common ground - If the GPIO is not isolated, the external circuit and GPIO interface must share a common power supply return. For example, in the case of a 2410, the 2410's power supply return (i.e., negative power supply input) must be connected to the external circuitry's power supply return.
- Edge rate - Strive for fast signal edge rates when a GPIO is driven by an external signal source. Slow rise and fall times can cause sampling errors and, in extreme cases, damage GPIO line receivers.